1. Field of the Invention
The present invention relates to a solid image pickup device, an image pickup system and a method of driving the solid image pickup device. In particular, the present invention relates to a solid image pickup device comprising a photoelectric conversion part, a charge-voltage conversion part for converting electric charges from the photoelectric conversion part to voltage signals, signal amplification means for amplifying the voltage signals, charge transfer means for transferring photo-electric charges from the photoelectric conversion part to the charge-voltage conversion part, and means for inputting a certain voltage to the charge-voltage conversion part; an image pickup system; and a method of driving the solid image device.
2. Related Background Art
As representatives of solid image pickup devices, there is a device comprising a photodiode and a CCD shift register, and a device called APS (Active Pixel Sensor), comprising a photodiode and a MOS transistor.
The APS includes a photodiode, a MOS switch, an amplification circuit for amplifying a signal from a photodiode and the like in each pixel and has many merits that the “XY addressing”, “making the sensor and the signal processing circuit into a single chip” or the like is achievable. In recent years, attentions have been attracted to APS owing to a promoted miniaturizing technique of MOS transistors and a raised demand for “making the sensor and the signal processing circuit into a single chip” or “reducing the consumption power”.
FIG. 14 shows the pixel part of a conventional ASP and an equivalent circuit of a solid image pickup device using it. These were reported by Mr. Eric R. Fossum et al. at a work shop of IEEE in 1995. The configuration of the prior art will be briefly described below.
The photoelectric conversion part is an embedded-type photodiode (PPD) used in CCD or the like. By providing a concentrated p layer on the surface, the embedded-type photodiode can suppress the dark current occurring at its interface with SiO2 on it and can provide a junction capacity also between the n layer of the accumulation part and the p layer on the surface of it, thereby increasing the saturated charge quantity of the photodiode.
The photo-signal charges accumulated in the photoelectric conversion part is read out via the charge transfer means (TX) comprising a MOS transistor to the floating diffusion region (FD).
The signal charges Qsig are voltage-converted into Qsig/CFD by the capacity of this floating diffusion region (CFD) and the signals are read out through a source follower circuit not shown in FIG. 14.
On applying an inverse bias to the n layer of the embedded-type photodiode, a depletion layer spreads from individual junctions between the concentrated p layer in the surface and the P well of the substrate in accordance with the bias. At this time, the number of electrons in the photodiode is almost equal to that of the intrinsic region sandwiched between both depletion layers and decreases in proportion to the width of the depletion layer. The number of electrons in the above intrinsic region at the time of the inverse bias=0 volt corresponds to the saturated charge quantity. When both depletion layers spread under action of the inverse bias and are connected to each other, the interior of the photodiode is depleted and the intrinsic region disappears. The inverse bias at this time is referred to as “depleted voltage (or completely depleted voltage)” hereinafter. Furthermore, when an inverse bias is applied increasingly, the electron concentration in the photodiode exponentially decreases, depending on an increase in inverse voltage. With the above sensor, if the photodiode interior is completely depleted in readout, charges generated by light are almost completely transferred to the floating diffusion region and simultaneously the charges are absent in the photodiode, thereby fulfilling the reset of electrons. Hereinafter, such a charge transfer is referred to as “depletion transfer”.
FIG. 15 shows the saturated charge quantity Qsat of a photodiode, a value of voltage VFDsat ((1) and (2) of FIG. 15) of the floating diffusion region in readout of the saturated charge, and the depleting voltage (3) with respect to the saturated voltage Qsat.
Symbol A denotes the lower limit value of saturated charge required for a practical photodiode, and symbol F denotes the upper limit value of saturated charge required for a practical solid image pickup device, while Symbols B and E denote the values of saturated charge quantity at VFDsat=depleted voltage.
VFDsat is given in terms of the following formula.VFDsat=Vres−Qsat/CFD 
Vres represents the reset voltage of the floating diffusion region.
In general, the saturated voltage of a photodiode is required to be more than a certain value and its lower limit value is a value denoted by A in FIG. 15. Besides, in order to attain the above depletion transfer, it is demanded to actualize the relationship of: VFDsat≧depleting voltage, and preferably
VFDsat>depleting voltage.
Thus, in case of (1) of FIG. 15, the upper limit value of depleted voltage satisfying this relationship is denoted by B of FIG. 15.
In case of VFDsat<depleted voltage, the inverse bias voltage of a photodiode becomes equal to VFD, an intrinsic region is present in the photodiode, and readout is carried out in accordance with the capacity division between the capacity by the above depletion layer and the capacity of the floating diffusion layer. Together with this, even after the readout, the amount of residual electrons close to the saturated charge quantity Qsat is present and the depletion layer does not occur. The residual electrons of this time causes an afterimage and a noise.
Accordingly, the design of the photodiode is required so that the saturated charge quantity Qsat in the photodiode meets the range C of A<Qsat<B.
The saturated charge quantity Qsat, or the depleting voltage, has a problem, however, likely to be affected by the production process. For example, it happens that only a 10% fluctuation of ion implantation dose quantity in the formation of the n layer of a photodiode brings about a change of 0.4 volts in the depleting voltage.
As a result, the yield of production lowers. As one method for avoiding these problems, the value of reset voltage Vres in the floating diffusion region is increased to obtain a state as indicated by the straight line (2) of FIG. 15, whereby the selection margins of the saturated charge quantity Qsat can be extended to the range of A-E. In this case, a higher reset voltage becomes necessary. This means that a high power source voltage must be secured to assure the signal/noise ratio and a great factor of obstructing a lower voltage of the APS lies in this point.
As well known, a high power source voltage brings about a rise in power consumption. Besides, in case of being integrated with a logic circuit, another high power source voltage must be prepared for a sensor chip independently of a low power source voltage of the logic circuit. This results in the deterioration of performances of an APS chip.